X64 Exception Type 0x12 Machinecheck Exception Link __link__ -

Here’s an informative breakdown of the x64 exception type 0x12 – Machine Check Exception , with links to further resources.

What Is Exception 0x12 (Machine Check Exception)? On x64 (and x86) architectures, exception vector 0x12 is the Machine Check Exception (MCE) . It is a hardware-initiated exception that indicates the CPU has detected an internal hardware error (e.g., cache errors, bus errors, memory errors, or uncorrectable ECC errors). Unlike typical exceptions (page faults, divide errors), MCEs are asynchronous — they don’t necessarily relate to the currently executing instruction but reflect a hardware problem detected by the processor’s Machine Check Architecture (MCA).

When Does It Occur?

Uncorrectable memory ECC error (hardware-detected) Bus or interconnect errors (e.g., PCIe, QPI/UPI) Cache errors (L1, L2, L3) that cannot be recovered Internal parity errors in CPU logic Thermal or voltage-related failures (depending on CPU implementation) x64 exception type 0x12 machinecheck exception link

If the error is recoverable (e.g., corrected ECC), the CPU may not raise an MCE but log it via MCA banks. Unrecoverable errors trigger exception 0x12.

How the OS Handles It

Windows — A MACHINE_CHECK_EXCEPTION blue screen (bugcheck 0x9C on older systems; newer systems may show WHEA_UNCORRECTABLE_ERROR ). Linux — Triggers a kernel panic; console output includes MCA bank registers, status MSRs, and mce logs. Firmware — May handle some corrected errors via SMI or BIOS notification before OS gets the exception. Here’s an informative breakdown of the x64 exception

The OS can attempt to log the error details (via MCA MSRs: IA32_MCG_STATUS , IA32_MCi_STATUS ), but once an unrecoverable MCE is delivered, system stability is compromised.

Key Control Registers (Model-Specific Registers, MSRs) | MSR | Index (hex) | Description | |----------------------|-------------|-------------| | IA32_MCG_CAP | 0x179 | Machine check capabilities (number of banks, extended features) | | IA32_MCG_STATUS | 0x17A | Indicates if MCE is in progress, and if restartable | | IA32_MCG_CTL | 0x17B | Global enable for MCE (if supported) | | IA32_MCi_CTL (i=0..n) | 0x400 + i 4 | Per-bank error enable | | IA32_MCi_STATUS | 0x401 + i 4 | Per-bank error status (error code, valid, uncorrectable, etc.) | | IA32_MCi_ADDR | 0x402 + i*4 | Address associated with the error (if valid) | After an MCE, the OS reads these banks to determine the fault source.

Recovery Possibilities (MCE vs. CMCI vs. Software Recoverable) It is a hardware-initiated exception that indicates the

Fatal MCE → System halts immediately or after panic. Recoverable MCE (newer CPUs) → Some errors can be contained (e.g., poisoned memory page). Linux supports mce=recoverable handling, killing only the offending process. CMCI (Corrected Machine Check Interrupt) – Not an exception; an interrupt for corrected errors.

Exception 0x12 is typically fatal unless the OS implements advanced containment (only on server-class CPUs with MCA recovery).